VIA Technologies P4XB-MA Manual do Utilizador descarregar pdf (Página 51)

BIOS Setup

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receive more data. Setting options: Enabled, Disabled.

PCI Master 0 WS Write

When Enabled, writes to the PCI bus are executed with zero wait state.

Setting options: Enabled, Disabled.

PCI Delay Transaction

The chipset has an embedded 32-bit posted write buffer to support delay

transaction cycles. Select Enabled to support compliance with PCI speci-

fication version 2.1. Setting options: Enabled, Disabled.

System BIOS Cacheable

Selecting enabled allows write through caching of the system BIOS ROM at

F0000h to FFFFF except F8000 to F8FFF, resulting in better system BIOS

performance.

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VIA Technologies P4XB-MA Manual do Utilizador Página 51